The increased popularity of wireless audio products has established a need for wireless headphone solutions but current circuit architectures, such as those using Bluetooth technology, have not been successful largely because their power consumption is too high. In addition, their interference management is poor, leading to unacceptable performance in real-life applications.
The commonly used architecture for radio (wireless) receivers is that which is referred to as the superheterodyne receiver architecture. This type of receiver performs at least one frequency down-conversion of the analog carrier (RF) frequency to an intermediate frequency (IF), using a local synthesizer (i.e. a reference frequency synthesizer/phase locked loop (PLL) circuit) and mixer circuit to obtain the baseband signal. Architectures using both a fixed and non-fixed IF are known but, disadvantageously, known architectures for the former require the use of at least two synthesizer/PLL circuits and those for the latter are not normally suited for using sub-sampling and require a high dynamic range in the IF and second down-conversion, due to channeling and aliasing factors, respectively. These requirements of known architectures increase the overall power requirements of the receiver.
Accordingly, there is a need for an improved receiver architecture which provides narrow band selection capability and low power consumption.